Next-generation memory hierarchies for edge physical and agentic AI

Physical AI and Agentic AI systems demand edge computing platforms that deliver real-time intelligence under tight power, latency, area, and cost constraints. As autonomous agents deploy large multimodal models, world representations, and continual learning engines, memory capacity and bandwidth become the primary bottlenecks restricting responsiveness and decision quality. With traditional SRAM facing strict scaling limits in advanced nodes, architectural innovation across the entire memory hierarchy is essential.

Memory movement dominates energy consumption in edge robotics, drones, and industrial AI during sensor fusion, planning, and control. High-density embedded memories, such as MRAM, FeRAM, FeFETs, and eDRAM offer compelling alternatives to SRAM through lower leakage, non-volatility, and smaller area overhead for on-chip model storage. Externally, advanced DRAM solutions like LPDDR, HBM, and 3D-stacked architectures supply the necessary bandwidth for heavy workloads. Paired with processing-in-memory (PIM) and event-driven computing, this integrated approach significantly reduces latency and energy consumption for real-world autonomous intelligence.