XTCO and CMOS 2.0: Compute scaling into the heterogeneous era

3D integrations such as High Bandwidth Memory and memory-on-logic are delivering improvements in computing efficiency as an augmentation to traditional Moore’s Law scaling. Yet computing applications continue to ask for more. At Imec, the XTCO and CMOS 2.0 programs examine future pathways beyond these initial steps into 3D chip stacking, exploring the possibilities and challenges of multi-layer and truly heterogeneous 3D integration. Dr. Yeric will discuss these technology programs, the opportunities they may provide, and the challenges in realizing complex 3DHI.