Greg Yeric

Greg earned his PhD in Microelectronics with a concentration in device physics at the University of Texas at Austin and has since worked in a variety of R&D roles up the semiconductor stack, including device engineering and process integration at Motorola’s Advanced Products Research and Development Labs, test structures and yield improvement at Test Chip Technologies, (later acquired by Synopsys), and physical design at Arm.  His predictive technology R&D group at Arm conducted leading DTCO research including early 3DIC pathfinding and the enablement of Arizona State’s ASAP7 7nm predictive PDK.  He spun a memory technology startup out of Arm Research and then moved to Washington DC to direct the R&D spending of the U.S. CHIPS Act, before joining imec in March of this year as VP of Portfolio for Compute Systems Scaling.