This presentation outlines imec’s approach to embedding sustainability into semiconductor R&D through the imec.netzero platform. By applying detailed Life Cycle Assessment (LCA) methodologies, imec quantifies environmental impacts at both fab and process levels, enabling data-driven decisions across the IC manufacturing value chain.
The SSTS program supports this effort by integrating bottom-up emissions modeling based on tool, material, and process data. Use cases across advanced logic, DRAM, and NAND technologies reveal emissions hotspots, particularly in lithography, dry etch, and tool power consumption. Hotspots are used to define projects run in the imec 300-mm fab to explore impact reduction.
To guide sustainable innovation, imec introduces the e-score, a metric that complements PPAC by incorporating environmental impact into early-stage technology evaluations. The presentation also highlights how imec’s modeling supports system-level assessments, including AI datacenter components and advanced packaging.
