How innovation in the back-end will fuel future hardware

For decades, the core of semiconductor innovation has centred on transistor density scaling to support the ever-increasing needs of compute-hungry applications—a trend accelerated by the advent of Artificial Intelligence (AI). However, these endeavours are now facing the harsh reality of escalating power demands. Crucially, the back-end is becoming a major bottleneck for power delivery and efficiency, demonstrating that innovation must occur at every level of future systems.

A decade ago, silicon photonics became a necessity for high-throughput, low-latency data transfer, initially deployed across long distances within and across data centers. Moving forward, wafer-scale optical interconnects will require new, non-silicon modulator and laser technologies directly integrated onto the photonic wafer for next-generation optical engines. At the edge, physical AI must process real-world data in real time, requiring tighter integration of chiplets. While silicon photonics foundations remain rooted in CMOS manufacturing, non-silicon materials are now essential for the next generation of optical engines. Furthermore, physical AI will rely on new modalities such as wafer-scale packaging, nanofluidics, and advanced CMOS post-processing.

This evolution also challenges today's fragmented semiconductor supply chain. Future systems will increasingly combine technologies, materials and dies originating from different platforms and suppliers into highly integrated architectures. Making this possible will require innovation in 3D and monolithic integration, advanced packaging and new approaches to heterogeneous integration. The back-end is therefore evolving from a supporting role into a critical innovation platform, enabling the next generation of high-performance, power-efficient hardware.