Harinarayanan Puliyalil

Harinarayanan Puliyalil is an R&D Etch Engineer at imec, where he focuses on advanced plasma etching and process integration for next‑generation logic technologies, with particular emphasis on complementary FET (CFET) architectures and nanosheet (NSH) devices. He joined imec in 2018 after completing his PhD at the Jožef Stefan International Postgraduate School in Ljubljana, Slovenia, where his doctoral research focused on the surface modification of polymer composites for advanced applications. At imec, his work spans plasma etch process development and integration for both logic and memory technologies, including CFET and NSH device fabrication, MRAM, IGZO‑based device integration, and BEOL interconnections.