Strategic paths to an AI-defined future

May 19-20, 2026 - Antwerp, Belgium

The race toward the next frontier in artificial intelligence is making daily headlines. But reaching next-gen AI isn't a sprint; it's a marathon. The rewards will be shared by humanity: applications that far exceed anyone's imagination, in domains such as healthcare, mobility, and robotics.

Getting there requires a collaborative effort along many paths. Cost- and energy-efficient hardware to handle demanding AI workloads. A vibrant start-up ecosystem forging new paths in deep-tech innovation. And flexible prototyping capabilities accessible to all who want to bring groundbreaking applications to market. Due to its unique position within the semiconductor ecosystem, imec stands at the crossroads of all these avenues toward an AI-defined future

Highlights

Hear from the minds shaping deep-tech innovation

Leading voices from across the semiconductor and AI-landscape share breakthrough research and strategic industry insights. Imec's pivotal role in hosting Europe's NanoIC pilot line - accelerating innovation beyond the 2nm node - will be a key topic of discussion.

Meet the international deep-tech community

Each year, over 2000 professionals converge in Antwerp to connect and shape the future of technology, from industry veterans to policymakers, start-up founders, and investors.

See innovation in action

Explore live demonstrations of cutting-edge semiconductor innovations enabling the next generation of AI applications, many making their public debut.

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Join NanoIC's journey beyond 2nm

As part of ITF World 2026, imec hosts a dedicated half-day NanoIC workshop on Wednesday 20 May, spotlighting Europe's unique capability to innovate beyond the 2nm node through the NanoIC pilot line. From advanced patterning and IGZO-based embedded memories to silicon-interposer architectures and fine-pitch RDLs, experts from across the semiconductor and AI value chain take you on a front-row seat into the ångström era and show how breakthrough device, interconnect, and system-level innovations can accelerate your own path from concept to AI-optimized chip designs.

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